1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, especially a semiconductor device having a MOS transistor and a method for manufacturing the same.
It has been known that a gate electrode wiring layer and source and drain contact wiring layers in a conventional MOS transistor are comprised of the same material. Japanese Patent No. 2504306 (especially, lines 40-48 in the left column of page 2, and FIG. 1) discloses a conventional example of a semiconductor device in which a gate electrode wiring layer, a source contact wiring layer, and a drain contact wiring layer are comprised of a aluminum layer. In this semiconductor device, a MOS transistor is formed on a silicon active region that is defined by a field oxide film formed through a local oxidation of silicon (LOCOS) process. This transistor includes a gate electrode that is comprised of a single aluminum layer and is also formed on a gate electrode, and source/drain wiring layers comprised of a single aluminum layer to have a contact with source drain regions comprised of a impurity diffusion layer.
The above described conventional MOS transistor has the following problems.
First, the above described conventional MOS transistor includes a gate electrode with a single layer structure of metal. Therefore, the work function (eV) of this gate electrode is lower than that of a gate electrode with a single layer structure of polysilicon. This causes the performance of a conventional MOS transistor to be degraded.
Second, the above described conventional MOS transistor includes source drain contact wiring layers comprised of a single layer structure of metal identical to the gate electrode. That is, a single metal layer that comprises source drain contact layers has a direct contact with source drain regions that is comprised of silicon including impurities. Therefore, degradation of a gate insulating film is caused by deposits included in spikes or metal wirings.
Third, a field oxide film is formed through the LOCOS process in the conventional method for manufacturing a semiconductor device. Therefore, a number of processes are needed in order to form a mask that is comprised of a resist pattern.
In view of the above, it will be apparent to those skilled in the art from this disclosure that there exists a need for an improved semiconductor device and an improved method for manufacturing a semiconductor device. This invention addresses these needs in the art as well as other needs, which will become apparent to those skilled in the art from this disclosure.